July 23, 2013
BELLEVUE, Wash., July 23 -- Impulse announced the availability of “Experimenter’s Simulation Software,” which enables developers to quickly evaluate the architecture offered by Solarflare’s new ApplicationOnload Engine (AOE). FPGAs are effective offload engines for some CPU bottlenecks. Shifting critical code to the FPGA’s massively parallel architecture enables critical paths to run as multiple streaming processes, accelerating computations by 10x or more over CPUs.
The software will be familiar to C programmers. It runs within Visual Studio, GCC or the like and provides the pragmas and extensions that enable C algorithms to be refactored into coarse grained logic, which machine compiles into multiple streaming processes to run in FPGA hardware.
Solarflare’s AOE integrates a large, powerful Altera FPGA in a network-friendly PCIe form factor. It is an excellent platform for developers to explore software/hardware codesign, and it can scale up for field deployment. “We welcome the introduction of well designed development boards like the AOE.” Said Ed Trexel, Impulse Accelerated’s Head of Engineering. He continued, “Software teams are increasingly curious about hardware based acceleration, and this lets them try it out on a robust, flexible platform.”
Impulse C was introduced in 2002 and is used by hundreds of teams from NASA to Wall Street, to rapidly experiment with offloading CPU logic to FPGA. “Impulse’s software gives developers a tremendous head start,” explained Bruce Tolley, Vice President, Solutions Marketing at Solarflare. “They can reduce schedule and technology risk in evaluating how well the offloading approach works for their C code and system architecture.”
This configuration of FPGA acceleration is used to offload custom packet inspection, preprocessing, trading, compliance, latency reduction, or instrumentation modules. The Impulse AOE Experimenter’s Software Simulator provides everything for users to refactor C and simulate how well it will machine compile into multiple streaming processes to run on the AOE’s FPGA. Functionality is verified within GCC, Visual Studio or the like. Users estimate performance, starting from pipeline rate efficiency, within Impulse CoDeveloper. Later, users can acquire an AOE and compile refactored algorithms all the way to hardware.
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