The Portland Group
Oakridge Top Right
HPCwire

Since 1986 - Covering the Fastest Computers
in the World and the People Who Run Them

Language Flags

Visit additional Tabor Communication Publications

Enterprise Tech
Datanami
HPCwire Japan

Adapteva Unveils 64-Core Chip


Chipmaker Adapteva is sampling its 4th-generation multicore processor, known as Epiphany-IV. The 64-core chip delivers a peak performance of 100 gigaflops and draws just two watts of power, yielding a stunning 50 gigaflops/watt. The engineering samples were manufactured by GLOBALFOUNDRIES on its latest 28nm process technology.

Based in LEXINGTON, Massachusetts, Adapteva is in the business of developing ultra-efficient floating point accelerators. Andreas Olofsson, a former chip engineer at Texas Instruments and Analog Devices, founded the company in 2008, and gathered $2.5 million from various VCs and private investors. With that shoestring budget, he managed to produce four generations of the Epiphany architecture, including two actual chips. The technology is initially aimed at the mobile and embedded market, but Olofsson also has designs on penetrating the supercomputing space.

Epiphany is essentially a stripped down general-purpose RISC CPU that throws out almost everything but the number-crunching silicon. But since it doesn't incorporate features needed by operating systems, like memory management, it relies on a host processor to feed it application kernels in the same manner as a GPGPU. The current implementation supports single precision floating point only, but plans are already in the works for a double precision implementation.

The general layout of Epiphany is a 2D mesh of simple cores, which talk to each other via a high-speed interconnect.  In that sense, it looks more like Intel's manycore Xeon Phi than a graphics processor, but without the x86 ISA baggage (but also without the benefit of the x86 ecosystem).



The latest Epiphany chip, which was spec'd out last fall, runs at a relatively slow 800MHz.  But thanks to its highly parallel design and simplified cores, its 50 gigaflops/watt energy efficiency is among the best in the business. NVIDIA's new K10 GPU computing card can hit about 20 single precision gigaflops/watt, but that also includes 8GB of GDDR5 memory and a few other on-board components, so it's not an apples-to-apples comparison. Regardless, a 100 gigaflop chip drawing a couple of watts is a significant achievement.

The downside of the design is that it uses Adapteva's own proprietary ISA, so there are no ready-made software tools that developers can tap into. "Everybody is very impressed by the numbers," Olofsson told HPCwire. "They just haven't quite been convinced they can program this thing."

That has now changed.  In conjunction with the 28nm samples, Adapteva has also released its own OpenCL compiler wrapped in their new software developer kit (SDK). The compiler is an adaptation of Brown Deer Technology's OpenCL implementation developed for ARM and x86 platforms. Brown Deer provides tools and support for high performance computing applications and is especially focused on acceleration technologies based on GPUs and FPGAs. The Adapteva implementation means developers can now use standard OpenCL source to program the Epiphany processor.
Olofsson says they chose OpenCL because it's a recognized open standard that is being used for heterogeneous computing platforms in all the segments Adapteva is interested in. In particular, it's getting some traction on heterogeneous platforms in the embedded space, where GPUs are increasingly being targeted to general-purpose computing.  "The way we are pitching [Epiphany] is that OpenCL GPGPUs may not be good at everything, because of their architectural limitations," say Olofsson. "So why not put another accelerator next to it that is also OpenCL-programmable."  

Adapteva is putting the SDK through its paces using existing OpenCL codes like 2D Fast Fourier Transform (FFT) and multi-body physics algorithms that were downloaded off the Internet. The company is currently using an x86-based board for these test runs, but since OpenCL has bindings for C/C++, essentially any commodity CPU is fair game as the host driver. Adapteva's SDK is currently in beta form and is being released to the company's early access partners.

As far as getting the Epiphany chips onto useful platforms, that's still a work in progress. At least some of the engineering samples of the 28nm chip will go to Bittware, an early customer of Adapteva's. Bittware used the early 16-core, 32-gigaflop version of Epiphany on its custom PCIe boards.  Those products are aimed at military and industrial application for things like embedded signal processing. Because of the need to minimize power usage in embedded computing, Epiphany is a good fit for this application domain.  At least one more vendor has signed up to develop Epiphany-based PCIe boards, but that company is not ready to go public just yet.

Adapteva's market aspirations extend beyond the military-industrial complex though. Olofsson believes Epiphany is ideal for mobile computing, and eventually HPC.  With regard to the former, Adapteva is planning to use the new chip to demonstrate face detection, an application aimed at devices like smartphones and tablets. Face detection and recognition rely on very compute-intensive algorithms, which is fine if you've got a server or two to spare, but it's beyond the number-crunching capabilities of most mobile-grade CPUs and GPUs today.

Other flop-hungry applications that could find a home on in this market include augmented overlays, gesture recognition, real-time speech recognition, realistic game physics, and computational photography. Like mobile-based face detection/recognition, all of these require lots of computational performance operating within very restricted power envelopes.

For high performance computing, the path is a little more complex. For starters, someone has to build a Epiphany-based PCIe card suitable for HPC servers, and then an OEM has to be enticed to support that board. To deliver a reasonable amount of computation for  a server -- say, a teraflop or so -- you would need multiple Epiphany chips glued to a card, which would necessitate a PCIe expansion setup of some sort. Not an impossibility, but probably not a job for a do-it-yourselfer.

More fundamentally though, the architecture has to add support for double precision floating point to be taken seriously for HPC (although applications like seismic modeling, image and audio processing, and video analysis are fine with single precision).  
In any case, double precision is already on Adapteva's roadmap. "We'll definitely have something next year," says Olofsson.

Beyond that, the company has plans on the drawing board to scale this architecture up to the teraflop/watt realm. Following a Moore's Law trajectory, that would mean that by 2018 a 7nm Epiphany processor could house 1,000 cores and deliver a whopping two teraflops.  Since such a chip would draw the same two watts as the current 100 gigaflops version, it could easily provide the foundation for an exascale supercomputer. Or a killer tablet.

 


 

Related Articles

Adapteva Builds Manycore Processor That Will Deliver 70 Gigaflops/Watt

Startup Launches Manycore Floating Point Acceleration Technology

 

 

Most Read Features

Most Read Around the Web

Most Read This Just In

Most Read Blogs


Sponsored Whitepapers

Breaking I/O Bottlenecks

10/30/2013 | Cray, DDN, Mellanox, NetApp, ScaleMP, Supermicro, Xyratex | Creating data is easy… the challenge is getting it to the right place to make use of it. This paper discusses fresh solutions that can directly increase I/O efficiency, and the applications of these solutions to current, and new technology infrastructures.

A New Ultra-Dense Hyper-Scale x86 Server Design

10/01/2013 | IBM | A new trend is developing in the HPC space that is also affecting enterprise computing productivity with the arrival of “ultra-dense” hyper-scale servers.

Sponsored Multimedia

Xyratex, presents ClusterStor at the Vendor Showdown at ISC13

Ken Claffey, SVP and General Manager at Xyratex, presents ClusterStor at the Vendor Showdown at ISC13 in Leipzig, Germany.

HPCwire Live! Atlanta's Big Data Kick Off Week Meets HPC

Join HPCwire Editor Nicole Hemsoth and Dr. David Bader from Georgia Tech as they take center stage on opening night at Atlanta's first Big Data Kick Off Week, filmed in front of a live audience. Nicole and David look at the evolution of HPC, today's big data challenges, discuss real world solutions, and reveal their predictions. Exactly what does the future holds for HPC?

Xyratex

HPC Job Bank


Featured Events


HPCwire Events