July 26, 2010
GPU industry-watcher Jon Peddie offered up some compelling stats in his latest blog. Peddie's research group looked at the installed base of x86 CPUs and GPUs and calculated the total number of instruction cycles available on each architecture. If the study is even close to accurate, the results are stunning. According to the research, in 2009 there were almost 450 billion compute cycles available every second (38 quadrillion a day) , and the vast majority of those cycles -- more than 95 percent -- came from installed GPUs. Better yet, the installed processor base seems to be growing exponentially. Peddie writes:
A general figure of merit is to multiply the processor’s clock by its word size. The GPUs running at one fourth the speed of a CPU, and with just a 32-bit processor compared to the 64-bit CPU still deliver the most MIPS because of their overwhelming number of cores.
Full story at Jon Peddie Research
10/30/2013 | Cray, DDN, Mellanox, NetApp, ScaleMP, Supermicro, Xyratex | Creating data is easy… the challenge is getting it to the right place to make use of it. This paper discusses fresh solutions that can directly increase I/O efficiency, and the applications of these solutions to current, and new technology infrastructures.
10/01/2013 | IBM | A new trend is developing in the HPC space that is also affecting enterprise computing productivity with the arrival of “ultra-dense” hyper-scale servers.
Ken Claffey, SVP and General Manager at Xyratex, presents ClusterStor at the Vendor Showdown at ISC13 in Leipzig, Germany.
Join HPCwire Editor Nicole Hemsoth and Dr. David Bader from Georgia Tech as they take center stage on opening night at Atlanta's first Big Data Kick Off Week, filmed in front of a live audience. Nicole and David look at the evolution of HPC, today's big data challenges, discuss real world solutions, and reveal their predictions. Exactly what does the future holds for HPC?