July 22, 2008
In the past couple weeks, there has been a lot of buzz about the IBM's upcoming Power7 processors, which are slated to be used in NCSA's multi-petaflop "Blue Waters" supercomputer and Big Blue's HPCS PERCS system. Most of the recent speculation was stirred up by an article in The Register penned by Ashlee Vance, who supposedly got a hold of some internal IBM docs. According to Vance:
The IBM documents have the eight-core Power7 being arranged in dual-chip modules. So, that's 16-cores per module. As IBM tells it, each core will show 32 gigaflops of performance, bringing each chip to 256 gigaflops. Just on the gigaflop basis, that makes Power7 twice as fast per core as today's dual-core Power6 chips, although the actual clock rate on the Power7 chips should be well below the 5.0GHz Power6 speed demon.
In fact, according to Vance, the IBM literature says the chips will be shipped at 4.0 GHz, although I think that the CPUs headed for Blue Waters will most likely come in at between 3 and 4 GHz. This is quite a bit slower than the 4.7 GHz seen in IBM's current Power6-based 575 systems. The reason is obvious. To achieve the 10 petaflop peak performance (and one to two petaflops of sustained performance) that IBM is aiming for, the company will need to populate the machine with nearly 40,000 8-core Power7 processors. Even at the 45nm process technology node, the processor guys will be forced to ease up on the CPU clock to keep the chips from throwing off too much heat.
The bigger problem is that the IBM Power (not PowerPC) family is not known to be particularly energy efficient by today's standards. The architecture was originally designed for high levels of single thread performance, which is great for enterprise workloads, like database apps, but in the supercomputing arena, relying on single threaded performance is considered bad form. Building a practical petascale machine on the Power architecture is going to be a challenge.
Consider the latest Green500 stats. The top Power6-based 575 machines all come in at less than 100 megaflops/watt, which is only 1/4 as efficient as the Blue Gene/P supers and about 1/5 as efficient as Cell processor blade-based systems. A more sobering data point is that the IBM Power6-based 575 supercomputer at the European Centre for Medium-Range Weather Forecasts uses 1.3 megawatts to run the Linpack benchmark and achieves a modest 80 teraflops. Scaling this system up to a one Linpack petaflop would require over 16 megawatts. Keep in mind that's not peak power consumption, nor does it include cooling or storage.
If IBM maintains the roughly 100 watt TDP for the Power7 to match the current Power6 (and older Power5), then you're talking 4 megawatts just for the CPU hardware in Blue Waters. You can easily double that to figure the power consumption of the whole machine, which, according to The Register piece, will also include 620 TB of memory and 5 PB/sec of memory bandwidth. If you add in storage and cooling, you might have to double the power once again. Since Blue Waters will be water cooled, some extra energy efficiency will gained there, but I think NSCA will need something like 10 megawatts to feed their multi-petaflop beast.
If IBM could cut the Power7 TDP to, say, 50 watts, they and NCSA would be in much better shape. One option the chip designers may use to squeeze more energy efficiency from the silicon is to add some sort of floating point hardware acceleration. As Timothy Prickett Morgan of IT Jungle pointed out last week, the Power7 design does allow for such features:
...IBM's [Power7] roadmap and its top techies have been talking about an "advanced hybrid core design." I have been led to believe that by hybrid core, IBM means bringing special functions that used to be done on the motherboard our elsewhere in computer networks back onto the chip, but not necessarily inside the processor core. (Think of the VMX AltiVec vector math units or the decimal math units on the Power6 chip and you get the right idea.) This hybrid approach lets the Power core do the work it is designed to do--run applications--while these adjunct chips assist with specific functions.
Maybe a souped-up version of AltiVec/VMX (vector multimedia extension), which was introduced in the Power6, would help things along. IBM could also make use of the Cell SPE cores to get more parallelism on-chip. But this type of hardware would be considered quite exotic in the traditional enterprise space, where most of the Power7s will be sold.
Blue Waters is scheduled for boot up in 2010, so IBM still has a couple of years to figure out how to keep the lights from dimming at NCSA. And fortunately, the company has plenty of experience with low-power supercomputing; the PowerPC-based Blue Gene and the Cell-based Roadrunner are both tops in energy efficiency. It should be interesting to see what IBM finally comes up with.
Posted by Michael Feldman - July 21, 2008 @ 9:00 PM, Pacific Daylight Time
Michael Feldman is the editor of HPCwire.
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