August 03, 2007
Not many computer system vendors develop their own compiler technology. Now SiCortex can claim to be among them. On Wednesday, the company announced that it had acquired the PathScale compiler business from QLogic Corp under undisclosed financial terms. PathScale's compiler team, along with certain intellectual property and business agreements, will now be under the control of SiCortex.
Jettisoning the compiler business from QLogic Corp would seem to be a good move for everyone involved. QLogic originally purchased PathScale in February of 2006 for $109 million in order to obtain their InfiniPath interconnect technology. The PathScale compilers just went along for the ride. According to Duncan Poole, director of marketing for the compiler group, QLogic was aware their networking business was not well aligned with the compiler group. As a seller of adapters, switches and management tools for various network topologies (Fibre Channel, iSCSI and InfiniBand), QLogic's attention was, by necessity, focused elsewhere. Over time it became clear that the compiler technology would be best served if it were partnered directly with a systems vendor, where application development tools, and compilers in particular, are viewed as fundamental technologies.
Even as an external entity, the PathScale compiler group had been involved with SiCortex since the company's formation in 2003. As one of the few commercial developers of MIPS processor compiler technology and the only one with expertise in the HPC space, PathScale was critical in providing a solution for SiCortex' MIPS-based HPC systems. From a financial perspective, the compiler business comes to SiCortex as a self-sustaining business -- a welcome dividend for a startup company that has yet to announce a product sale. The company gets an additional benefit by no longer having to pay QLogic for compiler development and maintenance.
Poole said there were several suitors for the compiler technology, but the SiCortex offer made the most sense. "In the course of this analysis, we looked where the compiler team could be best aligned," he said. "With our longstanding relationship, it became clear pretty quickly that SiCortex could be a happy home."
The cultural fit between the two organizations seems almost perfect. Both teams are performance-obsessed. The SiCortex supercomputing systems are designed to deliver an extreme FLOPS-per-watt experience. The current machines offer 324 peak megaflops/watt, a metric that is comparable to what IBM is claiming for the new Blue Gene/P architecture. Likewise, the compiler team is equally passionate about squeezing all the performance out of the hardware. According to Poole, if someone finds a compiler that generates better performance than theirs does on a given piece of code, they treat that as a bug in the PathScale compiler. That kind of manic devotion to efficiency could produce some interesting results under the new arrangement.
It should be noted that PathScale's bread-and-butter x86 compiler business will continue on. Developed at a time when compilers for Opteron-based HPC clusters were scarce, the PathScale x86 products filled a void in that rapidly expanding market. The C/C++ compilers are tightly integrated with the GNU tool chain, allowing users to build applications that mix and match GNU compiler generated objects with PathScale generated ones. PathScale also supports Fortran 95, which was derived from an SGI-based open source version. Current customers include big government labs and academic institutions. Although SiCortex isn't planning to develop its own x86-based systems, the company has no intention of alienating HPC customers or losing revenue by abandoning the x86 compiler product line.
SiCortex could find other ways to benefit from PathScale's established x86 customer base. For example, these same customers might be enticed to move their applications to higher performing SiCortex platforms, since they would be able to retain their development environment. And SiCortex customers would have the option to migrate to x86 environments if their applications needed to run on traditional clusters at some point. Of course, the downside is that the better the compiler is at making x86 clusters perform well, the less reason people will have to consider SiCortex an alternative.
Developing and selling tools for competing platforms may or may not prove to be a problem for SiCortex. Intel develops and sells compilers and other tools that run just fine on AMD Opterons. In a highly intertwined technological landscape, it can be difficult to come up with products that don't also benefit your competitors to one extent or another. The objective is to make sure your products provide relatively more benefits for your company.
And now that the compiler technology has been taken in-house, SiCortex intends to take full advantage of the new arrangement. Not only will they be able to bundle the compiler suite with their HPC hardware, but the company also intends to tap the technical expertise in the compiler group to help design future SiCortex hardware. Fred Chow, who headed the PathScale team at QLogic and is now the new director of compiler engineering at SiCortex, helped write the original optimizing compiler for the MIPS processor with John Hennessy 25 years ago. Having the hardware and software engineering in one place could offer some nice synergies for the company.
SiCortex is also planning to leverage compiler improvements across all hardware platforms. Enhancements to parallel computing elements such as auto-parallelization and OpenMP runtime support will increase performance on systems, regardless of the underlying processor architecture. In the future, they intend to add support for Co-Array Fortran (as part of the Fortran 2008 standard) and probably UPC. The objective is to create compiler technologies that can be applied across many types of highly parallellized platforms.
10/30/2013 | Cray, DDN, Mellanox, NetApp, ScaleMP, Supermicro, Xyratex | Creating data is easy… the challenge is getting it to the right place to make use of it. This paper discusses fresh solutions that can directly increase I/O efficiency, and the applications of these solutions to current, and new technology infrastructures.
10/01/2013 | IBM | A new trend is developing in the HPC space that is also affecting enterprise computing productivity with the arrival of “ultra-dense” hyper-scale servers.
Ken Claffey, SVP and General Manager at Xyratex, presents ClusterStor at the Vendor Showdown at ISC13 in Leipzig, Germany.
Join HPCwire Editor Nicole Hemsoth and Dr. David Bader from Georgia Tech as they take center stage on opening night at Atlanta's first Big Data Kick Off Week, filmed in front of a live audience. Nicole and David look at the evolution of HPC, today's big data challenges, discuss real world solutions, and reveal their predictions. Exactly what does the future holds for HPC?