|The Leading Source for Global News and Information Covering the Ecosystem of High Productivity Computing / October 23, 2007|
BRISTOL, UK, Oct. 23 -- ClearSpeed Technology, the world leader in acceleration for high performance computing (HPC), announces the first ClearSpeed User Group Meeting, which offers advanced technical training for porting HPC applications to ClearSpeed's Advance accelerators. The meeting will take place on Nov. 12 from 9:00 a.m. to 4:30 p.m., at the Grand Sierra Resort and Casino in Reno, Nevada.
The ClearSpeed User Group Meeting is an opportunity for software developers to exchange coding tips and tricks, find out how peers are resolving software challenges, talk with ClearSpeed's technical experts, and learn about new coding techniques. Registration and additional information for the ClearSpeed User Group Meeting is available at http://developer.clearspeed.com/csug.
Technical discussions at the User Group Meeting will provide software developers with the information needed to create accelerated applications in a heterogeneous multi-core environment. Guest speakers include Jamil Appa, senior principle engineer at BAE Systems; Philip Brown, PhD student at Bristol University; Steve Reinhardt, vice president of joint research at Interactive Supercomputing Inc., and Tobias Brandvik, PhD Student at Whittle Laboratory, Cambridge University.
"Software developers must rethink the way they construct their codes in order to tap the performance potential of accelerated contemporary multi-core hardware architectures," observed Nathan Brookwood, research fellow at Insight 64. "The ClearSpeed User Group meeting during SC07 offers software professionals a great opportunity to exchange ideas with others seeking to maximize the potential of HPC applications."
In addition to the User Group Meeting, ClearSpeed has launched the ClearSpeed Developer Program, which provides developers with the information and tools they need to accelerate their applications. Membership includes access to ClearSpeed's developer Web site, http://developer.clearspeed.com, which will officially launch Nov. 12. The program also provides developers with early access to new software releases, developer forums, technical updates, advantageous pricing and access to user group meetings and events. Additional information and registration for the ClearSpeed Developer Program is available at http://developer.clearspeed.com.
For more information on ClearSpeed's software development tools, tune in to an exclusive podcast interview with HPCwire, available at http://www.taborcommunications.com/hpcwire/podcasts/clearspeed/index.html. ClearSpeed General Manager Ben Bennett discusses ClearSpeed's tools that exploit the benefits of accelerated x86-based systems. He also reviews how HPC organizations are using acceleration technology to achieve greater floating point performance to help solve real-world problems.
ClearSpeed Technology is a semiconductor company that develops massively parallel coprocessors and accelerator boards delivering unmatched performance per watt for high performance computing applications on industry standard systems. ClearSpeed has offices in San Jose, California and Bristol, UK and has over 50 patents granted with additional pending. For more information, visit www.clearspeed.com.